My Technical Glossary

Configurable Logic Block. The CLB constitutes the basic FPGA cell. The FPGA is an array of CLBs organized in columns and rows on the silicon die. CLBs are used to implement macros and other designed functions. They provide the physical support for an implemented and downloaded design. They have inputs on each side, and this versatility makes them flexible for the mapping and partitioning of logic.
Complex Programmable Logic Device. CPLDs are a class of programmable logic devices. They feature the speed, design simplicity, and predictability of PALs. Conceptually, they consist of PAL-like function blocks that can be interconnected through a switch matrix.
Dynamic Host Configuration Protocol. Dynamic Host Configuration Protocol allows the dynamic leasing of IP addresses to those computers configured as DHCP clients. By using DHCP, you are freed from the burden of manually assigning IP addresses to most of your workstations.
Field Programmable Gate Array. FPGAs are a class of programmable logic devices. They feature a gate-array-like architecture with a matrix of logic cells surrounded by a periphery of I/O cells.
Input/Output Block. An IOB is a collection or grouping of basic elements that implement the input and output functions of FPGA and CPLD devices.
[1] Acronym for phase alternation by line. A television signal standard (625 lines, 50 Hz, 220 V primary power) used in the United Kingdom, much of the rest of western Europe, several South American countries, some Middle East and Asian countries, several African countries, Australia, New Zealand, and other Pacific island countries.
[2] Programmable Array Logic. A PLD in which the OR array is fixed (pre-defined), but the AND array is programmable. PAL chips use fuse-programmable logic (i. e., overvoltage is applied to portions of the chip to physically blow a circuit open).
Programmable Logic Device. A programmed integrated circuit. The group of devices known as PLDs include PROMs, Programmable Logic Arrays (PLA), and Programmable Array Logic/Generic Array Logic (PAL/GAL).
VHDL is an acronym for VHSIC Hardware Description Language. VHSIC is an acronym for Very High-Speed Integrated Circuits. VHDL can be used to model a digital system at many levels of abstraction ranging from the algorithmic level to the gate level.


Dirk Hoffmann -CPPM-, February 2003